1. Field of the Invention
The present invention relates to a load driving circuit which performs drive control of a load, and particularly relates to a load driving circuit which performs drive control of a load by switching an N-channel type power MOSFET on/off.
2. Description of the Related Art
The N-channel type power MOSFET (hereinafter referred to as the power NMOS) has a low on-resistance, compared to the P-channel type power MOSFET, and is capable of carrying a high current. Accordingly, in spite of the fact that the gate voltage must be increased to above the power-supply voltage, the power NMOS is used also as a high side switch, which drives a load on the power supply side.
FIG. 5 gives an example of a conventional load driving circuit using a power NMOS 2 as a high side switch for driving a load 1, such as a lamp, a solenoid, or the like, and FIG. 6 shows a signal waveform and operation waveforms of the sections in FIG. 5.
To the drain terminal of the NMOS 2, a power supply 3 is connected, and the source terminal of the power NMOS 2 is connected to a ground terminal through the load 1. In addition, the gate terminal of the power NMOS 2 is connected to the output terminal of a voltage step-up circuit 4, and to the junction point between the gate terminal of the power NMOS 2 and the output terminal of the voltage step-up circuit 4, the drain terminal of the NMOS 5 is connected. Further, the source terminal of the NMOS 5 is connected to the ground terminal through the current source 6, while the gate terminal of the NMOS 5 is connected to the output terminal of the drive circuit 7.
Into the input terminal of the voltage step-up circuit 4 and the input terminal of the drive circuit 7, a drive signal Vin for switching the power NMOS 2 on/off is input. The drive signal is a square wave changing between two levels of High and Low. When the drive signal Vin is changed to High, the voltage step-up circuit 4 starts charging the gate terminal until the gate voltage Vg of the power NMOS 2 reaches a voltage level higher than the power-supply voltage of the power supply 3 that is applied to the drain terminal. Thereby, the power NMOS 2 is turned on, being brought into the conducting state (the on state), and current being supplied to the load 1. The voltage step-up circuit 4 functions as a drive circuit for turning the power NMOS 2 on.
On the other hand, the drive circuit 7 is a circuit, such as an inverter, or the like, for outputting a signal obtained by inverting the drive signal Vin, and when the drive signal Vin is changed to Low, the drive circuit 7 drives the NMOS 5 into the conducting state. When the NMOS 5 is driven into the conducting state, the current source 6 discharges the gate terminal of the power NMOS 2. Thereby, the gate voltage Vg is lowered, the power NMOS 2 being turned off to be brought into the non-conducting state (the off state). The NMOS 5, current source 6 and drive circuit 7 function as a shut-off circuit 8.
The turn-off operation of the power NMOS 2 in the conventional load driving circuit will be described in more detail with reference to FIG. 6.
As shown in FIG. 6 (a), when the drive signal Vin is changed to Low at time t1, the NMOS 5 is driven into the conducting state, the current source 6 drawing the charge from the gate terminal of the power NMOS 2, thereby, as shown in FIG. 6 (b), reducing the gate voltage Vg of the power NMOS 2 over a time period of time t1 to t3. When the gate voltage Vg is reduced to close to the threshold voltage Vth of the power NMOS 2, the power NMOS 2 is turned off, thereby, as shown in FIG. 6 (c), reducing the voltage of the source terminal connected to the load 1 (hereinafter referred to as the output voltage) Vout over a time period of time t2 to t3. Generally, the time from the moment when the drive signal is changed from High to Low to that when the output voltage Vout starts reduction is called the off-time Toff, while the time from the moment when the output voltage Vout starts reduction to that when it fully falls is called the fall time Tf, and from viewpoint of response the off-time Toff is preferably short, while the fall time Tf, from the viewpoint of noise (dV/dt), is not always required to be the shortest, and is determined on the compromise between the noise and the turn-off loss.